On February 19, 2019, 11:00, Dr. Silviu-Ioan Filip will deliver the following talk at the Institute Seminar:
A hardware friendly rational function approximation evaluator
In this talk we present an automatic method for the evaluation of functions via polynomial or rational approximations and its hardware implementation, on FPGAs.
These approximations are evaluated using Ercegovac’s iterative E-method adapted for FPGA implementation. The polynomial and rational function coefficients are optimized so that they satisfy the constraints of the E-method.
We present several examples of practical interest; in each case a resource-efficient approximation is proposed and comparisons are made with alternative approaches.